What is Capped Via (Via in Pad)?
Capped vias is a technology that allows to design VIP (via in pad) because of flatness surface. Copper via filling as resin via filling plus copper capping are the two main technological solution available today.
The increasing request for printed circuit boards miniaturization, typical of some market sectors, led engineers to design very complex PCB layouts, often inserting interconnecting holes into the BGA pads. So doing the same pad is used both for realizing the internal circuitry of the board (putting in communication the different layers) and its natural SMT use. The advantage resides in a significant reduction of the board size, the disadvantage in the enhanced complexity of the SMD components mounting procedure and the introduction of potential reliability lacks into the assembled board.
When a hole is present in a pad, where a SMD component has to be mounted on, a significant quantity of the exposy glue can flow into the hole generating a void (dry joint) that can influence the liability of the component and/or a sudden break of the component connection to the board.
As mentioned above, two different approaches, but not completely alternative, can be used to solve these kind of problems: filling copper and capped vias. The filling copper technology (see the dedicated section) requires the deposition of extra copper into the hole, until the requested filling percentage is obtained: to not compromise the thickness of the pad (the deposition, even in very small percentage, affects also the pad) a dimple is always present and a perfect planarity can not be guaranteed.
Some SMD components do not require planarity, some other does: in this last case the capped vias technology is the only solution. The capped vias technology requires the hole to be filled with resin and then plated: an extra, very thin, copper cap is so superimposed to the pad. The advantage resides in the preservation of the interconnections realised by the hole and the absolutely perfect planarity of the pad, that allows to each component to be easily mounted.
The capped vias technology can be used also in another situation, involving buried vias instead of laser vias (BGA pads) as above.
Because of the mechanical processes the printed circuit boards are subjected to, when the SBU technology is applied, the plating of the buried vias can be affected by some micro-break at each corner. The risk is obvious: the malfunctioning or the break of the interconnections realised by the buried via and the following unreliability of the assembled board. To avoid this potential problem, the buried vias are filled with resin and plated. This process, in fact, give robustness to the via and preserve the board desired performance.
About JY Electronic®
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